This invention relates to a building block LSI, and more particularly to a building block LSI in which routing or wiring of the blocks can be easily and effectively carried out.
One example of a building block LSI is a microprocessor LSI. A microprocessor includes various circuit blocks, e.g., data ROM, instruction ROM, sequencer, I/O, ALU, multiplier, etc. These circuit blocks are all formed on the same silicon chip so that a single chip microprocessor LSI is formed. When such a microprocessor LSI is designed or fabricated, effective routing or wiring of the blocks is one of the important factors in obtaining a LSI having a high density.
Conventionally, for interlock routing of the blocks in a building block LSI, the routing area between the blocks is divided into linear or L-shaped channels (bandshaped routing areas), and each channel is sequentially wired from possible ones. The method of dividing the interblock routing area into linear or L-shaped channels, and the method of determining the processing order of the channels to be wired have been already reported (M. Fukui et al., "A New Block Interconnection Algorithm for VLSI Layout System," Proceedings of ISCAS '85; Fukui et al., "A Block Interconnection Algorithm for Hierarchial Layout System," IEEE Transactions on Computer-Aided Design, Vol. CAD-6, No. 3, May 1987). It is possible to divide, in any case, the interblock routing area into linear and L-shaped channels so that the processing order of all the channels may be determined.
the wiring can be guaranteed 100 percent when the wiring processing of the channels is repeated sequentially and completely in the determined processing order.
FIG. 1 is an example of conventional channel routing, in which 1A, 1B are circuit blocks, 2 denotes terminals, 3 is a horizontal line segment, 4 is a vertical line segment, 5 is a through-hole, and 6 is a straight line-shaped channel. The horizontal line segment 3 and vertical line segment 4 are drawn in the mutually isolated separate layers (not shown), and the two layers are connected by opening a through-hole at the intersecting position of the wires, so that a desired wiring is realized. The steps according to this routing method are as follows, step 1: the routing topology of each net (a group of terminals to be wired at the same potential) is determined, step 2: the vertical direction position of each horizontal line segment 3 is determined so that the width of the channel may be minimized as long as the positional constraints between horizontal line segments 3 are satisfied, i.e., satisfying such constraints that a certain horizontal line segment 3 must be located above an other horizontal line segment 3 and that a certain horizontal line segment 3 and another horizontal line segment 3 must be disposed at a certain spacing in the vertical direction, step 3: a vertical line segment 4 is drawn from each terminal 2 to the horizontal line segment 3 to be wired, and a throughhole is opened at the intersection of the horizontal line segment 3 and vertical line segment 4, and the routing is realized. The channel routing method is always 100 percent possible unless the channel width is limited, and its feature lies in that the channel width can be narrowed to the minimum width necessary for routing after completing the routing processing, and effective routing processing is possible. This is possible because the horizontal direction position of the terminals is not changed if the upper and lower circuit blocks of the channel are moved in the vertical direction, so that the routing topology and positional constraints of the horizontal line segments 3 are not changed.
Referring now to FIG. 2, an example of the difficulty encountered in wiring by the conventional channel routing method is illustrated. In the case of an L-shaped channel 6L as shown in FIG. 2, when the circuit block 1A at the upper right corner is moved in the vertical direction, the channel direction position of the terminals at the left side of the circuit block 1A at the upper right corner is changed, or when the circuit block 1A is moved in the lateral or horizontal direction, the channel direction position of the terminals at the lower side of the circuit block 1A is changed. Therefore, wherever the circuit block is moved, the routing topology and positional constraints of horizontal line segments 3 of any one of the nets are changed, and collision of wires occurs, so that the feature (advantage) of the channel routing shown in FIG. 1 is sacrificed.
Therefore, in the convention method of routing by using horizontal and vertical line segments, in the case of routing in an L-shaped channel area, it is not possible to make the wiring having a minimum channel width.